1. Field of the Invention
The invention relates to a method for forming an oxide layer having multiple thicknesses, and more particularly to a method for forming gate oxides in which their thickness variations are slight.
2. Description of the Prior Art
High density and performance associated with ultra large scale integration require semiconductor devices with design features of 0.25 microns and under, e.g. 0.18 microns. The reduction of design features to 0.25 microns and below challenges the limitations of conventional semiconductor technology for forming gate oxides.
The reliability of circuit components is also affected by the thickness of the gate oxide. For example, if an excessive potential is applied to the gate electrode, the gate dielectric breaks down and causes a short circuit to occur between the gate electrode and the source of the transistor. The potential at which the gate dielectric breakdown occurs is termed the "breakdown voltage" and is related to the thickness of the gate oxide. Since the gate oxide must be thick enough to prevent gate dielectric breakdown, a thicker gate oxide is necessary to support a higher breakdown voltage under a higher operating voltage.
Certain semiconductor devices have circuit components operating at different voltages. For example, speed-critical components of a microprocessor are typically operated at a lower voltage, but less speed-critical components of the microprocessor are operated at a higher voltage. As another example, a device in combination of high-speed (HS), low-power (LP) and input/output (I/O) CMOS is typically operated at a voltage about 1.2 V, 1.2 V and 2.5 V, individually. It is desirable to use different gate oxides for the different transistors. HS-CMOS can use a gate oxide region of about 16 to 33 angstroms, preferably 19 angstroms, LP-CMOS uses about 16 to 33 angstroms, preferably 25 angstroms and I/O-CMOS uses one about 33 to 80 angstroms, preferably 50 angstroms.
However, it is different to control well those gate oxides having different thicknesses with slight variation. If thickness of gate oxide cannot be precisely controlled, the reliability of those transistors is susceptible to poor performance.